Working from these pinouts, the MaskROM pinout has /OE on pin 33 (31 on the DIP-32 package), and /CS on pin 24 (pin 22 on the DIP-32 package). However, from my own tracing, pin 23 on the cart edge (/RD), connects to /OE on the SRAM, as well as pin 24(22) on the MaskROM. So, according to that pinout, RAM /CS is connected to ROM /OE, is that correct? I would have thought that both /OE's would be connected, leaving the /CS decoding to the MAD-1, but maybe tying both /OE's together would create bus contention? I don't know, I just want to confirm the pinout... it doesn't actually matter for MaskROM's, you can toggle /CS and /OE in either order for a read operation, but when you add FlashROMs to the table and actually want to be able to program it in-circuit, then it does matter...