Ok, so I did some more reading and researching. I think I understand why the transistor circuit is included on the boards. I'm going to repeat myself a bit but I want to give a clear picture of my findings.
So, from what I've seen, many SRAM chips in the 62256 and 6264 family have a specification on their datasheets for "Standby current" and "Data retention voltage". Normally, I see a data retention voltage of 2V. The standby current is the current that the SRAM draws when in a low power state, which the SRAM enters whenever the supply voltage is (usually) below 4.5V. The SNES outputs ~5V onto the cartridge, the battery is set for 3.3V, so whenever the SNES is on the SRAM operates normally. Whenever the VCC voltage on the SRAM is below 4.5V, as when the battery is the sole supplier of power, it enters a sleep mode where data is stored but functionality is disabled (as long as that supply voltage is above the data retention voltage specification).
The standby current on the chips I had was pretty high. With a resistance of 1kΩ (which is used on the SNES boards), the current was high enough that the voltage could drop down below the 2V necessary to keep the SRAM on (V=IR, so for example 0.5mA through 1kΩ resistor is a full half volt across the resistor, subtracting from the battery voltage puts it at 2.7V). The blocking diode also has a voltage drop based on current as well, in the datasheet. On my original boards from when I first posted this last year, I had used 220Ω resistors because they were convenient. Therefore, with the lowered resistance, I didn't see the effects of the voltage drop as much, BUT I was still discharging the battery faster than I noticed. This wasn't (completely) due to the circuit I used, it was due to my SRAM chips. Kinda. More on that later.
So what I'm saying so far is, my circuit seems to work just as well as the official Nintendo one. Except for one key component.
The standby current on most datasheets I've found for the better-suited parts are in the microamps. But this comes with a very important caveat. For one 64K SRAM chip, for example, this standby current is in the microamps ONLY when the /CE voltage is held high, OR when the CE2 pin is held low (within 0.2V).
(I ordered the -LL chips, for reference).
So, the boards with the transistor circuit have a pull-down resistor on the CE2 pin, which is also connected to the emitter of the NPN. This means the CE2 pin will be defaulted to GND whenever the board is off, or the reset button isn't pressed (because /RESET on the cart is 5V during normal operation). Whenever the RESET line is 5V, the CE2 pin is pulled high, which allows the operation of the SRAM.
Thus, whenever the power is off, the CE2 pin is tied to GND which then allows the standby current on the SRAM to drop to very low currents. This is why the transistor circuit is necessary, or at the least, why the pull-down is necessary. I'm not
exactly sure why the transistor needs to be there and why the RESET line isn't just tied to CE2 directly, but maybe it has something to do with glitch prevention or the available current supply isn't very high from the RESET pin. I don't know, I could test it further, but I don't care too much.
So back to my circuit. The CE2 pin on my boards is tied to VCC when using 64K SRAM. My idea was to rely on only the /CE pin to turn the SRAM on and off, because I wanted to just buy a bunch of 256K SRAM packages and tie the unused address pins to VCC to emulate a 64K SRAM package. And the 256K SRAM packages, well they don't have a CE2 pin. So in order to enter a low standby current mode on my boards for whatever SRAM you use, you need to instead make sure the /CE pin is pulled high when the power is off. So the pull-up resistor on the /CE pin to SRAM VCC should take care of that, right?
But, for whatever reason, I'm measuring a 0.5V drop across the pull-up resistor, so the /CE pin does not meet the criteria to put the chip into the low standby current mode. I'm kind of at a loss as to why it's not pulling up all the way to VCC. Maybe if I used a smaller resistance? (I'm using a 5kΩ on the board in front of me, but I called out 1kΩ on the circuit). But I don't know where the current is going, it's only connected to the LS139 totem-pole output, and that chip isn't even powered on. Perhaps there's some leakage current through the totem-pole circuit? I'm not sure, that seems unlikely to me though.
Anyway, the boards work ok, it just has bad leakage current that drains the battery faster. The solution at the moment seems to be switch to the transistor circuit for the 64K SRAM, be sure to use lower standby current parts, and try to find a 256K SRAM that has lower standby current even without the /CE pin being pulled high so the simple pull-up works ok. Or... I could figure out why there's that voltage drop on the pull-up resistor... given that there aren't too many 256K SRAM games out there, this might be put on the back burner for now. I spent all week on this problem, it's kind of burning me out.