Format :
SHVC-ABCD-REV
SHVC = Nintendo abrevasion for "Super Famicom".
A = Number of mask ROMs on the board.
Code:
1 = Single ROM (any size)
2 = Two ROMs (usually 512kb + 1MB)
3 = Three ROMs (usually 1MB + 1MB + 512kb)
B = Two ROMs (usually 1MB + 2MB or 2MB+2MB)
L = Two ROMs (usually 2Mb + 4MB)
Y = Two ROMs (usually 512kb + 512kb)
B = Memory mapping
Code:
A = LoROM memory mapping (mode 20)
J = HiROM memory mapping (mode 21)
other = custom memory mapping (often with an ASIC on the board)
C = SRAM size.
Code:
0 = No SRAM on the board
1 = 2 KB
3 = 8 KB
5 = 32 KB
etc...
D = Misc.
Code:
B = SRAM is battery backed with discrete componants
M = SRAM is battery backed and decoded with the MAD-1 chip
N = Adress decoding is done with discrete componants
REV = Revision number
For example : SHVC-1J3B is a board with has one mask ROM on it, HiROM memory mapping, and 8KB of battery backed SRAM but has only discrete logic chips, no MAD-1.
SHVC-1J3M is identical exept that there is a MAD-1 to do the adress decoding and build-in intelligent bettery back up circuit.
So, as far I know, the only difference between those two is where the ROM and RAM are mirrored exactly, and where there is open bus.