I am a little confused with cart connector 48. In several schematics it is listed as A23, but when you actually trace it out on a cart it is connected to maskrom A22. Assuming these schematics are correct, is it due to Hirom / Lorom that the maskrom A22 is connected to Pin 48?
Or is there even an A23 in the Snes?
Are you asking if A23 and A22 are swapped (wrong) in this pinout from
nocash?
I've found this to be accurate although I haven't heavily tested it for myself. A22 goes to the MAD which I have verified to work.
Code:
Front/Round Rear/Flat
Solder side Component side
MCK 21M - 01 32 - /WRAMSEL
EXPAND - 02 33 - REFRESH
PA6 - 03 34 - PA7
/PARD - 04 35 - /PAWR
<key>
GND - 05 36 - GND
A11 - 06 37 - A12
A10 - 07 38 - A13
A9 - 08 39 - A14
A8 - 09 40 - A15
A7 - 10 41 - A16
A6 - 11 42 - A17
A5 - 12 43 - A18
A4 - 13 44 - A19
A3 - 14 45 - A20
A2 - 15 46 - A21
A1 - 16 47 - A22
A0 - 17 48 - A23
/IRQ - 18 49 - /ROMSEL
D0 - 19 50 - D4
D1 - 20 51 - D5
D2 - 21 52 - D6
D3 - 22 53 - D7
/RD - 23 54 - /WR
CIC0 - 24 55 - CIC1
CIC2 - 25 56 - CIC3 3.072MHz
/RESET - 26 57 - SYSCK
+5V - 27 58 - +5V
<key>
PA0 - 28 59 - PA1
PA2 - 29 60 - PA3
PA4 - 30 61 - PA5
SOUND-L - 31 62 - SOUND-R
SHIELD
No, i'm not saying he's wrong by any means. I'm saying that I dont understand how it is that #48 is A23, so why is it that A22 on a maskrom goes to #48? I know on hirom carts #47 is connected to MAD pin 12, which should be A22. So why isn't A22 on the maskrom connected to MAD or pin #47?
The A0-A23 cartridge slot pin-outs are referring to the SNES CPU address lines.
Which aren't necessarily same as the ROM address lines. Namely CPU.A15 and CPU.A22 are special:
In a LoROM cartridge, CPU.A15 isn't connected to the ROM address bus (and accordingly the higher address lines are shifted, CPU.A16..A21 wired to ROM.A15..A20).
And, in the "normal" SNES mapping scheme, CPU.A22 is always LOW in LoROM cartridges, and (for everything except exception vector accesses) it's always HIGH in HiROM cartridges.
Or in other words, CPU.A22 is used as some sort of a "LoROM/HiROM Flag", not as a regular address line. So, you won't connect that to the ROM chip (and accordingly the next higher address line is shifted too, so CPU.A23 connects to ROM.A22 in HiROM, and shifted twice: to ROM.A21 in LoROM).
When saying "normal" SNES mapping scheme, that's referring to cartridges that use Bank 00h-3Fh/40h-7Fh for LoROM, or Bank 40h-7Dh/80h-FFh for HiROM, which is supposedly the way how it was originally intended.
Anyways, some of the bigger LoROM carts are using bank 00h-7Dh/80h-FFh for LoROM (in that case CPU.A22 is used as a regular address line and does connect to the ROM chip).
Ahh that makes a lot more sense! I was thinking too linear with this, figuring rom A22 and Snes A22 must be connected...I obviously overlooked the fact that A15 is also ignored.
Thanks for clearing that up, nocash!
That cleared up some things that have been unclear for me as well. Thanks for the great explanation nocash.