Hey guys,
Working with my Altera FPGA dev board and I can't seem to get even a basic game like Tetris to load on anything other than GBC and GBA. I've been doing it in Verilog, and I get the Nintendo logo on my original DMG and Pocket, but then it goes to a blank screen every time. All 32K games like Tetris or Dr Mario work perfectly on a GBA or GBC console, though.
Here's my super simple mapper below, where FL_xxx is the flash memory:
I've got FL_ADDR[15] wired to a switch, so I can toggle between two 32K games, for testing.
The board I'm using is a simple pass-through that connects the pins of the console to a 40-pin IDE header in order to interface with the GPIO pins on the FPGA.
Anyone have any ideas of what could be at fault?
Working with my Altera FPGA dev board and I can't seem to get even a basic game like Tetris to load on anything other than GBC and GBA. I've been doing it in Verilog, and I get the Nintendo logo on my original DMG and Pocket, but then it goes to a blank screen every time. All 32K games like Tetris or Dr Mario work perfectly on a GBA or GBC console, though.
Here's my super simple mapper below, where FL_xxx is the flash memory:
Code:
module no_mapper(
input not_wr, not_rd, not_cs,
input [15:0] addr,
output [7:0] data,
input [9:0] SW,
input [3:0] KEY,
output [21:0] FL_ADDR,
input [7:0] FL_DQ,
output FL_OE_N,FL_CE_N,FL_RST_N,FL_WE_N
);
assign FL_ADDR = {6'b000000,SW[0],addr[14:0]};
assign FL_OE_N = not_rd;
assign FL_RST_N = 1'b1;
assign FL_WE_N = 1'b1;
assign FL_CE_N = addr[15];
assign data = FL_DQ;
endmodule
input not_wr, not_rd, not_cs,
input [15:0] addr,
output [7:0] data,
input [9:0] SW,
input [3:0] KEY,
output [21:0] FL_ADDR,
input [7:0] FL_DQ,
output FL_OE_N,FL_CE_N,FL_RST_N,FL_WE_N
);
assign FL_ADDR = {6'b000000,SW[0],addr[14:0]};
assign FL_OE_N = not_rd;
assign FL_RST_N = 1'b1;
assign FL_WE_N = 1'b1;
assign FL_CE_N = addr[15];
assign data = FL_DQ;
endmodule
I've got FL_ADDR[15] wired to a switch, so I can toggle between two 32K games, for testing.
The board I'm using is a simple pass-through that connects the pins of the console to a 40-pin IDE header in order to interface with the GPIO pins on the FPGA.
Anyone have any ideas of what could be at fault?