I've read many topics but in the end I never found a solution.
I'm trying to make my own carts for 27c160/27c322 EPROM at the moment (flash will follow once SRAM works) with battery backup function. While the carts itself work fine, the SRAM doesn't.
I'm trying to use a 74LS139, Capacitors, Diodes, Resistors and of course the CR2032 battery.
This is for LoROM but it doesn't work. Super Metroid for example gives me the Anti Piracy screen cause it can't find the SRAM.
Is there another way to do this? I've read about MAX795/STM795 or even BA6162 but those are nearly impossible to obtain nor would I know how to work with them properly.
Logic attached as an image.
I'm a little confused as to why your SRAM is labeled with pin 26 as /RESET (instead of +CE)
I mean, that's a fine connection.
Is the correct memory region when A15 and /ROMSEL are low, A20 and A21 are high? (
I guess that's what nocash says)
Anyway, using a "real" battery controller won't help things if the game can't even find the RAM. A "real" battery controller should only help if you're losing data on power failure.
Oh, just disregard the labeling. It is indeed CE2 or +CE as you name it.
Usually I never had any problems saving the games (tested Legend of Zelda and various SMW Hacks) when wiring the 74LS139 like this on original boards to allow games up to 32MBit (using 27c322) to be saved on the 64KB SRAM found on SHVC-1A3B-XX boards with just a 32 pin MaskROM.
I will test that tomorrow and see if A20 and A21 are high and A15 and /ROMSEL are low.
Though, the 1A3B board series had a transistor on board. Could that be the problem in my logic?
Super Metroid was on
BA3M... no transistor there.
Interestingly, the
1A3B-01 doesn't have the BJT, although all the later ones do. Not clear what it's doing without a picture of the back.
I wrote a memory explorer for the SNES some number of
months ago. You could use it to make sure that the RAM is where you believe it should be (instead of open bus)
Attachment:
snes-memory-browser.zip [2.08 KiB]
Downloaded 115 times
Use all twelve buttons on controller 1 to change the view window.
Note: this program actually tries to show the SST39 Identification page, by writing the correct unlock sequence to ROM. It shouldn't be a problem if you're either not using Flash, or if you disconnect /WR while using it.
I assume the transistors helps with battery backup. I can scan a 1A3B-XX front and back later.
I think I got 1A3B-01 and later revisions here. Have to check.
As for your program, I will test that as well but how would I press all 12 buttons? I mean, how to press all 4 D-Pad buttons at once?
I meant each of the twelve buttons increases or decreases one of the six hexadecimal digits of the 24-bit address
Got it, lol.
Anyway, I was able to get a SHVC-1A3B-XX board. Sadly I didn't find any 01 revisions without transistor.
My scanner didn't like them so I had to take a picture. Hope this helps with the transistor logic.
Wait a moment, I have three games (FF2us, LoZ:LttP, SMAS) on 1A3B. I don't need pictures...
The BJT is an NPN (2SC2021) (C=+5V, B=R3, E=R2) in common-collector configuration (voltage buffer/current amplifier)
R2 pulls down RAM pin 26 (+CE).
R3 goes to /RESET (cart pin 26)
In other words, rather than just being
Code:
/RESET ----+--- SRAM +CE
|
100k
|
gnd
It's instead
Code:
+5v
|
|/
/RESET ---100k---|
|↘
+-- SRAM +CE
|
1k
|
gnd
but I can only guess why the difference. (time constant of the pulldown?)
Ah, okay. Didn't know if you had carts so I wanted to make sure.
Hm, interesting. Might give that 2SC2021 a chance and see if it changes anything as well as adjusting the connections properly.
Will report back later how it went.
Okay, no matter how I solder it, the SRAM won't be recognized. Even tried a new one.
Connected it like an original 1A3B but I must be something missing.
Also added the 10nF capacitor to the 74'139 as it was causing problems without one on other games but still no change.
Here's how I wired it:
For the moment, why don't you try entirely disabling the battery backup circuitry, and just connect the SRAM's Vcc and +CE to +5V directly? There's two variables here, and I'm not certain whether they've been decoupled.
Alright, connected VCC and CE+ directly to 5V.
Nintendo logo appears, no anti piracy screen, just a black screen. But it doesn't go on.
... I think there might be something wrong with your ROM?
In Super Metroid (JU), there's code starting at ROM 0x698 to copy 8K of cart RAM (from 0x700000) to SNES-internal RAM, then clears cart RAM, then fills the cart RAM mirror at at 0x702000 with garbage, then makes sure it can read the same garbage from 0x700000 (and here's when the anti-piracy warning would pop up), and finally copies the backup back to cart RAM.
It then calls a routine at ROM 0x80A0 (5a22 0x8180a0) to calculate the checksum of each of the save slots... and calls a routine at ROM 0x286 to initialize a save slot ... and after that "1994" should appear.
I dumped the game using a Retrode, checksum matches. Game works fine. No byte differences to the original ROM.
Also dumped the game with an Arduino Cart Dumper from sanni. Same results. No byte differences.
I don't think it's the ROM now. I'm sure I'm missing something but I have yet to find out what.
I will send you pictures of the current PCB. Maybe the error can be found that way.
EDIT: I mean it's unlikely but maybe I got 2 faulty RAMs here? Or can the EPROM still be defective even if I can dump the game just fine?
Either way, I will try a new board as well.
EDIT2: Just noticed I grounded 27c322's /CE line. I added it back to SNES /CE line as well as RAM /OE but still freezes after the Nintendo logo. I'm starting to get lost here but I don't want to give up either. :'(
Your problem lies with your decoder, not your save circuit.
You can't just copy what Nintendo did and expect it to work. A 1a3b cart is limited to 1mb rom size and yet, you're trying to run a 3mbit game. Your data busses are like boxers - fighting with themselves. A decoder is the traffic-cop of databusses allowing only 1 databuss to talk at a time. You have a rom and a ram - hence two databusses both trying to talk at the same time.... which = crash and black screen.
That's why the game boots and then crashes as soon as it looks to the sram for information.
Well..... the above is my supposition as I don't have a full picture of how you have things connected. So it's my best guess.
Most on this forum are glad to help, but help point you in the right direction so you can find the answers on your own. The joy of learning
I'm glad for any help and always love to learn something new.
Also, I'm using my own decoder's pinout which has been proven to work for up to 32MBit ROMs.
Pinout as follows:
Code:
__ __
SNES #49 |01\/16| +5V
SNES #40 |02 15| Pin 04
SNES #40 |03 14| A20
Pin 15 |04 13| A21
NC |05 12| NC
NC |06 11| NC
ROM /OE |07 10| NC
GND |08 09| RAM /CE
------
EPROM /OE is connected to Address Decoder
EPROM /CE is connected to GND
Even tried connecting EPROM /CE to RAM /OE and SNES/CE. No difference. Game freezes after Nintendo Logo.
Ice Man wrote:
I'm glad for any help and always love to learn something new.
Also, I'm using my own decoder's pinout which has been proven to work for up to 32MBit ROMs.
Pinout as follows:
Code:
__ __
SNES #49 |01\/16| +5V
SNES #40 |02 15| Pin 04
SNES #40 |03 14| A20
Pin 15 |04 13| A21
NC |05 12| NC
NC |06 11| NC
ROM /OE |07 10| NC
GND |08 09| RAM /CE
------
EPROM /OE is connected to Address Decoder
EPROM /CE is connected to GND
Even tried connecting EPROM /CE to RAM /OE and SNES/CE. No difference. Game freezes after Nintendo Logo.
I'm not at my desk so I say this from memory... I don't think pins 2/3 is right. And the /CE should be connected.
When you say A21, A20, are you accounting for skipping A15?
Relabeling things a little:
Code:
.--\/--.
/ROMSEL |01 16| +5V
SNES A15 |02 15| Pin 04
SNES A15 |03 14| SNES A20
Pin 15 |04 13| SNES A21
NC |05 12| NC
NC |06 11| NC
ROM /CE |07 10| NC
GND |08 09| RAM /CE
'------'
This is consistent with
nocash's description of the MAD-1-
(namely, when jumpered for LoROM, /ROMCE is low when /ROMSEL is low and SNES A15 is high, and /RAMCE is low when /ROMSEL and SNES A15 are low AND SNES A20, A21, and A22 are high)
SNES A22 doesn't explicitly need to be decoded because A22 is necessarily high if /ROMSEL and SNES A15 are low.
@Markfrizb: Since I used that pinout on a modified 1A3B board with a 32 pin MaskROM and tested it successfully on many 2-4MB LoROM games (LoT:ALttP, Super Metroid Hacks, Super Mario World Hacks, etc.) and they all saved and worked fine that way.
But if you happen to have another pinout once you're able to check, I wouldn't mind to try that one either.
I just can't imagine it is the decoder's problem.
Ice Man wrote:
@Markfrizb: Since I used that pinout on a modified 1A3B board with a 32 pin MaskROM and tested it successfully on many 2-4MB LoROM games (LoT:ALttP, Super Metroid Hacks, Super Mario World Hacks, etc.) and they all saved and worked fine that way.
But if you happen to have another pinout once you're able to check, I wouldn't mind to try that one either.
I just can't imagine it is the decoder's problem.
I'm out of town on business so I won't be able to check til later on, but if this decoder on previous 3-4mB builds have worked before, then maybe your save circuit isn't enabling the sram? Maybe It's keeping it disabled all the time....
Funny thing is, I changed the capacitor from 100nF to 10nF on my SuperCIC PIC and the game didn't freeze but I got the anti piracy screen. I'm sure I'm using the wrong components or doing something wrong. Even removed the 100nF cap for the EPROM completely, but no difference.
The parts I'm using are:
CR2032
2x 1N4148
1x 1k Ohm
1x 100k Ohm
2x 100nF Ceramic Cap (for EPROM and SuperCIC)
Even while trying to copy the 1A3B logic completely (with original parts found on a 1A3B board), it does not work, while in theory, it should. o_O
Even tried to connect VCC and GND directly to the cart edges with wires instead but it didn't change anything.
I'm kind of lost here. It's the only puzzle left to finish the cart. :'(
Could make a trivial batch that bypasses the antipiracy check, I suppose... But I don't think it'll help, I think you'll just get new different exciting bugs.
With the anti piracy screen on I can check if the SRAM is working or not. Quite handy in this case, heh. But sadly it does not work yet. I will check it again tomorrow and check everything there is...hoping to find the mistake.
Yeah, so I connected VCC and GND directly to the cart connectors as well as the GND net. Used all parts found in an 1A3B board and connected them the same way. It does not work. I give up for now. I have no idea what's wrong..
After some more testing and finding a mistake in address decoding, still no success.
I accidentally decoded A19/A20 instead of A20/A21 but even with the fix, no SRAM detection.
If I use a MAD-1 on my board the SRAM works like a charm.
Now another question. Did someone actually try to get an identical IC like the MAD-1 or knows where to get any without using any donors?
And how possible is it to actually use a PIC as decoder instead?
Ice Man wrote:
After some more testing and finding a mistake in address decoding, still no success.
I accidentally decoded A19/A20 instead of A20/A21 but even with the fix, no SRAM detection.
Have you been using my simple test program?
Quote:
Now another question. Did someone actually try to get an identical IC like the MAD-1 or knows where to get any without using any donors?
I know certain people are making repros using 74'139s, as you were trying to...
Quote:
And how possible is it to actually use a PIC as decoder instead?
One of the modern ones with CLCs could do it; that's basically just a tiny bit of programmable logic glued onto a microcontroller.
Could even stuff it into the same physical IC as has the SuperCIC...
Crap, I honestly forgot about that. I will try it later today.
Though, what am I looking for exactly with the memory viewer?
The SRAM will most likely be empty.
Open bus looks like a solid region of memory filled with the bank byte (in this program).
(i.e. reading from $6F0000 on your 1A3B-equivalent should show 512 bytes of $6F, and if the RAM works, you should see something other than 512 bytes of $70 at $700000)
Game is saving now!
I connected a 100k resistor between SRAM VCC and CE line as well as connecting 100k + 1N4148 between Batttery+ and SRAM VCC and an additional 1N4148 from VCC to SRAM VCC.
SRAM +CE is connected to VCC
SRAM /OE is connected to Cart #23
All ICs got a 100nF capacitor as well.