Following
someone else's diagram of frame timing, I'm working on a diagram too. This one gives an overview of the pixel data path in the PPU.
View diagram (SVG, 848x208 pixels)
Maybe "Background and sprite enables" could be split up into two boxes, and drawn as selectors that select either 0 (if bg/sprites disabled) or the output from the preceding stage (if enabled). Kinda awkward in hand-coded SVG though perhaps.
Some indication that the nametable position counter is v (loopy_v) might be nice too.
Nice diagram!
I suggest adding a start and end symbol to make it easier to see where to start. Also, use different shapes to differentiate between data and process.
Updated. Secondary OAM is an input (parallelogram), as are PPUMASK entries, many of which now feed an AND gate. Fine scroll is an input feeding a multiplexer.
To do:
- Break up BG enable and BG clip with logic to generate them from H sequencer