Well, suppose my emulator doesn't follow the PPU fetching pattern, but rendering pixels at real time. I notice gfx glitches, like in scanline.nes, Rockman 3 (glitched line is over Magnetman instead of Shadowman), and so on.
Is there some kind of latency (between the pixel and the CPU cycle) for using PPU $200x registers for scrolling, or even for the use of scroll data?
There's no latency at all, they take effect immediately. However, the horizontal coarse scrolling bits are not reloaded immediately, only the fine scrolling bits are. So if you write to $2005 in the middle of the scanline the upper bits will only take effect after the next HBlank.
Well, yes. Since the two nametable tiles are fetched during the HBlank, I was wondering about some latency (pipeline) between the first pixel and the scroll registers, or kind of.
The fine scrolling always updates immediately, but I'd imagine that the tile you want to fetch wouldn't be fetched until the next time the PPU goes to fetch a tile, and since the PPU always fetches tiles at the same times during scanlines, it would be anywhere from an 8 to 16 pixel latency (remember, the buffer always has two tiles in it, and you're fetching the tile after the current two)
Plus, I think (but I'm not sure) the MMC3 scanline counter has some kind of latency in it too, unless I'm getting confused with another mapper.
Edit: I'm assuming the 2006/2005/2005/2006 trick by the way, but you'd see similar effects if you were just writing 2006.