Test rom "05-nmi_timing.nes" should print "4 4 4 3 3..." as a "pass". My emulator prints "4 4 4 4 3..." and fails. After debugging the test rom, I noticed that a NMI is being acknowledged too late in a special case of being set at PPU cycle 0 (VBlank start) and with 3 PPU cycles left to run. My hack is to acknowledge the NMI if there are 3 PPU cycles left, but is this correct?
Code:
CUSTOM_NMI=1
.include "shell.inc"
.include "sync_vbl.s"
zp_byte nmi_data
nmi: stx nmi_data
rti
main: jsr console_hide
loop_n_times test,10
check_crc $A6CCB10A
jmp tests_passed
test: jsr print_a
jsr disable_rendering
jsr sync_vbl_delay
delay 29749+29781
lda #$FF
sta nmi_data
ldx #0
lda #$80
sta $2000
landing:
; NMI occurs after one of these
; instructions and prints X
ldx #1
ldx #2
ldx #3
ldx #4
ldx #5
lda #0
sta $2000
lda nmi_data
jsr print_dec
jsr print_newline
rts
.include "shell.inc"
.include "sync_vbl.s"
zp_byte nmi_data
nmi: stx nmi_data
rti
main: jsr console_hide
loop_n_times test,10
check_crc $A6CCB10A
jmp tests_passed
test: jsr print_a
jsr disable_rendering
jsr sync_vbl_delay
delay 29749+29781
lda #$FF
sta nmi_data
ldx #0
lda #$80
sta $2000
landing:
; NMI occurs after one of these
; instructions and prints X
ldx #1
ldx #2
ldx #3
ldx #4
ldx #5
lda #0
sta $2000
lda nmi_data
jsr print_dec
jsr print_newline
rts