Anes wrote:
when exactly mmc3 slcounter is hited?
On the rising edge (0 -> 1) of the PPU A12 line -- but only if it's been low for several (at least 9) PPU cycles. Under "normal" conditions this occurs:
- when the game changes the PPU address to flip on bit 12 from an off state ($0xxx -> $1xxx)
- on cycle 260 in the scanline (the first sprite CHR fetch)
For the nitty gritty details (if you want a super-accurate counter), you'll have to be familair with what fetches the PPU makes and when. BT's ppu doc is a good reference:
http://nesdev.com/2C02%20techn ... erence.TXTAlthough the info in that doc which actually discusses the MMC3 counter is wrong (he says A13 when it's really A12)
Quote:
Is it the 6502 "nmos programming manual" a good source to extract from it the cpu cycles?.
This doc is always good:
http://www.obelisk.demon.co.uk/6502/reference.html
Or if you want details on which bytes are read/written on which cycles... the section near the bottom of this doc is great:
http://nesdev.com/6502_cpu.txt