I've got Verilog to "draft" stage for the following:
20₁₆ (32) irem G-101 (note: Major League submapper not implemented)
41₁₆ (65) irem H3001
21₁₆ (33) Taito TC0190
30₁₆ (48) Taito TC0690 (not in Nintendulator!)
6B₁₆ (107) Magicseries Corp, unknown name, used by "Magic Dragon" just because it had "irem" on the wiki page somewhere. (not in Nintendulator?)
If a mapper doesn't have known specified startup states for registers, would it be better to just let them sit uninitialized, throw in some garbage, or zero/sequentialize them as emulators do occasionally? (Nintendulator and Mednafen and Disch disagree on some points)
ed: Magicseries
ed2: removed while I start scouring out these syntax errors
20₁₆ (32) irem G-101 (note: Major League submapper not implemented)
41₁₆ (65) irem H3001
21₁₆ (33) Taito TC0190
30₁₆ (48) Taito TC0690 (not in Nintendulator!)
6B₁₆ (107) Magicseries Corp, unknown name, used by "Magic Dragon" just because it had "irem" on the wiki page somewhere. (not in Nintendulator?)
If a mapper doesn't have known specified startup states for registers, would it be better to just let them sit uninitialized, throw in some garbage, or zero/sequentialize them as emulators do occasionally? (Nintendulator and Mednafen and Disch disagree on some points)
ed: Magicseries
ed2: removed while I start scouring out these syntax errors