GreenPAKs are this interesting kind of programmable logic in-between FPGAs and old-school PALs. Like PALs, there's no "fabric": everything can be connected to everything. Also like PALs, they only have about 1000-4000 total bits of configuration state. (Like PALs, they also can operate at 5V.) Like FPGAs, they consist of a bunch of tiny LUTs. Also like FPGAs, the configuration state is in RAM and (like some FPGAs) they have some OTP memory that can hold a single fusemap.
Unlike both, they're really inexpensive: 65¢/@100. At this price, it starts being worth considering replacing designs that would use multiple discrete logic ICs with one GreenPAK.
Silego's newest GreenPAK models have started to get just big enough (Up to 15 latches and 10 LUTs, up to 25 LUTs) to start being Interesting, but still really cramped.
So I'd thought I'd share a bit of the golfing I've done. None have been tested in hardware. I should do that.
So, first, the easy thing: an almost-MMC1, supporting MMC1 mirroring control, four bits of PRG banking (512K 32) and two-by-four bits for CHR banking (64K 4+4). No changing PRG or CHR banking style, no PRG-RAM, no &$80s bit that will reset banking style. Still uses the serial interface, because doing so let me double capacity for both PRG and CHR (by adding one output for each).
Programmer's Interface:
• Write to $8000: write twice, little end first, same meaning as bottom two bits of MMC1 register at $8000
• Write to $A000 or $C000: write four times, same meaning as bottom four bits of MMC1 registers at $A000 or $C000
• Write to $E000: write four times, little end first, unlike MMC1 instead specifies one of sixteen 32 KiB PRG banks
Unlike the MMC1, writes are NOT buffered and instead they flow through continuously.
"Hey, wait, that trade-off sucks!"
Yeah, it does. Tomorrow I'll post the I/O-limited variant that doesn't use the serial interface. (As a result, it has enough spare logic to implement 16+16F PRG banking instead)
Unlike both, they're really inexpensive: 65¢/@100. At this price, it starts being worth considering replacing designs that would use multiple discrete logic ICs with one GreenPAK.
Silego's newest GreenPAK models have started to get just big enough (Up to 15 latches and 10 LUTs, up to 25 LUTs) to start being Interesting, but still really cramped.
So I'd thought I'd share a bit of the golfing I've done. None have been tested in hardware. I should do that.
So, first, the easy thing: an almost-MMC1, supporting MMC1 mirroring control, four bits of PRG banking (512K 32) and two-by-four bits for CHR banking (64K 4+4). No changing PRG or CHR banking style, no PRG-RAM, no &$80s bit that will reset banking style. Still uses the serial interface, because doing so let me double capacity for both PRG and CHR (by adding one output for each).
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Programmer's Interface:
• Write to $8000: write twice, little end first, same meaning as bottom two bits of MMC1 register at $8000
• Write to $A000 or $C000: write four times, same meaning as bottom four bits of MMC1 registers at $A000 or $C000
• Write to $E000: write four times, little end first, unlike MMC1 instead specifies one of sixteen 32 KiB PRG banks
Unlike the MMC1, writes are NOT buffered and instead they flow through continuously.
"Hey, wait, that trade-off sucks!"
Yeah, it does. Tomorrow I'll post the I/O-limited variant that doesn't use the serial interface. (As a result, it has enough spare logic to implement 16+16F PRG banking instead)