I'm designing a simple cart dumper, which might also work to program RAM carts or Flash carts. I know all the games have been dumped, but it's a fun project anyway. All the old dumpers I've seen use the parallel port, which is a little long in the tooth. My newest machine doesn't even have UART's, so I decided to go with USB. Plus I have some experience with USB, having developed a NES controller adapter a few years ago.
Anyway, there are 72 pins on the cart, of which I figure 31 of them need to be interfaced to by my dumper. I combined the PRG and CHR address and data buses, figuring I won't need to access them simultaneously. I found a nice PIC micro which has USB, as well as 35 IO pins. That means I don't even need latches to do this, just the one chip. I think that leaves the final cost at around $30.
Anyway, I wanted to double check my logic. Below are the pins on the cart edge I plan to connect to my micro. Did I leave any out that I will need? I'm right on the edge of running out of IO's, so if I've missed anything I need to add some serial->parallel registers to reduce pin count.
So I think I can pull this off with 23 outputs, and 8 i/o's. Did I miss anything that I need to dump a cart? Or to load code into a SRAM cart? I didn't connect any CIC or expansion port pins, but I don't think I need them. Thanks for any input, I'll post the schematic once I get it drawn up.
Anyway, there are 72 pins on the cart, of which I figure 31 of them need to be interfaced to by my dumper. I combined the PRG and CHR address and data buses, figuring I won't need to access them simultaneously. I found a nice PIC micro which has USB, as well as 35 IO pins. That means I don't even need latches to do this, just the one chip. I think that leaves the final cost at around $30.
Anyway, I wanted to double check my logic. Below are the pins on the cart edge I plan to connect to my micro. Did I leave any out that I will need? I'm right on the edge of running out of IO's, so if I've missed anything I need to add some serial->parallel registers to reduce pin count.
Code:
Cart Pins - name | MCU pin
13+29 - A0 | output 1
12+28 - A1 | output 2
11+27 - A2 | output 3
10+26 - A3 | output 4
09+25 - A4 | output 5
08+24 - A5 | output 6
07+23 - A6 | output 7
06+59 - A7 | output 8
05+60 - A8 | output 9
04+61 - A9 | output 10
03+63 - A10 | output 11
02+62 - A11 | output 12
39+64 - A12 | output 13
40+65 - A13 | output 14
41 - A14 | output 15
49+30 - D0 | i/o 1
48+31 - D1 | i/o 2
47+32 - D2 | i/o 3
46+33 - D3 | i/o 4
45+69 - D4 | i/o 5
44+68 - D5 | i/o 6
43+67 - D6 | i/o 7
42+66 - D7 | i/o 8
14 - R/W | output 16
50 - /PRG | output 17
15 - /IRQ | output 18
38 - PHI2 | output 19
37 - CLK | output 20
56 - /W | output 21
21 - /R | output 22
58 - /A13 | output 23
57 - /VCS | (not connected)
22 - VA10 | (not connected)
13+29 - A0 | output 1
12+28 - A1 | output 2
11+27 - A2 | output 3
10+26 - A3 | output 4
09+25 - A4 | output 5
08+24 - A5 | output 6
07+23 - A6 | output 7
06+59 - A7 | output 8
05+60 - A8 | output 9
04+61 - A9 | output 10
03+63 - A10 | output 11
02+62 - A11 | output 12
39+64 - A12 | output 13
40+65 - A13 | output 14
41 - A14 | output 15
49+30 - D0 | i/o 1
48+31 - D1 | i/o 2
47+32 - D2 | i/o 3
46+33 - D3 | i/o 4
45+69 - D4 | i/o 5
44+68 - D5 | i/o 6
43+67 - D6 | i/o 7
42+66 - D7 | i/o 8
14 - R/W | output 16
50 - /PRG | output 17
15 - /IRQ | output 18
38 - PHI2 | output 19
37 - CLK | output 20
56 - /W | output 21
21 - /R | output 22
58 - /A13 | output 23
57 - /VCS | (not connected)
22 - VA10 | (not connected)
So I think I can pull this off with 23 outputs, and 8 i/o's. Did I miss anything that I need to dump a cart? Or to load code into a SRAM cart? I didn't connect any CIC or expansion port pins, but I don't think I need them. Thanks for any input, I'll post the schematic once I get it drawn up.