I have part of this bizzare IRQ counter here, I can't get my head around how strange it is. I've checked it a number of times and I'm sure the diagram is correct.
Here's the rundown: it appears to be double write where you write the LSB then MSB, but it's not...Due to the common load, D0-7 is loaded into MSB and LSB of the 16-bit counter. I looked at the datasheet and ENP doesn't appear to have any affect on the outputs to control which byte gets loaded, perhaps I'm wrong about this. (I really hope I am!) Another thing that seems out of place is the ability to reset U7. Any insights would be appreciated.
Here's the rundown: it appears to be double write where you write the LSB then MSB, but it's not...Due to the common load, D0-7 is loaded into MSB and LSB of the 16-bit counter. I looked at the datasheet and ENP doesn't appear to have any affect on the outputs to control which byte gets loaded, perhaps I'm wrong about this. (I really hope I am!) Another thing that seems out of place is the ability to reset U7. Any insights would be appreciated.