Hello,
I'm planning on doing some FPGA NES, but have a bunch of questions.
First:
Am I a dumb or the PPU Patent information #4,824,106, FIG 7 is somewhat wrong in some places? (OBJ 0 Hit evaluation, EXT errors, wrong clock signals, etc.)
Sec:
At the schematic of the "Synthesizer" portion of the PPU (FIG 8):
Does it exists a manner to discover the exact values of resistors 117-1 to 117-9 in that resistor ladder? I know they're on-chip, but I wanna have composite output from my unit, and an external board with this resistor ladder, with its input connected to the gates at the left, and output to the TV set. Would it be possible, or I will have to calculate them based on PPU output voltages?
Thanks in advance.
I'm planning on doing some FPGA NES, but have a bunch of questions.
First:
Am I a dumb or the PPU Patent information #4,824,106, FIG 7 is somewhat wrong in some places? (OBJ 0 Hit evaluation, EXT errors, wrong clock signals, etc.)
Sec:
At the schematic of the "Synthesizer" portion of the PPU (FIG 8):
Does it exists a manner to discover the exact values of resistors 117-1 to 117-9 in that resistor ladder? I know they're on-chip, but I wanna have composite output from my unit, and an external board with this resistor ladder, with its input connected to the gates at the left, and output to the TV set. Would it be possible, or I will have to calculate them based on PPU output voltages?
Thanks in advance.