Be carfull, many MMC1 docs are obsolete, and there is stupid mistakes like backward mirroring. Yes, vertical mirroring is 0 and horizontal mirroring is 1, not the opposite.
Well, if you have trouble about controlling a mapper, don't begin with the MMC1. Writing to all mappers but MMC1 is easy.
Imagine you're using a simple CNROM board (mapper 3). You have only one register that switches a 8kb CHR-ROM page. Writing at any adress between $8000 and $ffff will write to the mapper and switch the page you want to, normally CNROM uses only 2 bits, so you can have 4 different 8kb CHRROM page (into one 32kb CHRROM chip). Just write the number of the CHR page you want to the mapper (0, 1, 2 or 3), that's it (in pratice you also have to worry about bus conflicts, but I won't go into details now).
Now let's process to the next level. You're using a UNROM board (mapper 2). You also have only one register, that expand PRGROM instead of CHRROM, and is 3 bit or 4 bit wide (depending of UNROM or UOROM boads). This allow you to swap a 16kb rom bank page at $8000-$bfff, but all the data at $c000-$ffff will remain always the same (the last 16kb page) because of the 74HC32 chip. This allow you to use 8 or 16 bank of 16kb to have a 128kb or 256kb PRGROM chip. Writing to the mapper works as simple as CNROM, write anything to $8000-$ffff will set one of your 8 (or 16) PRGROM banks.
Now let's process to the third level, the MMC1. It has 4 different registers, one for mirroring and bankswitching control, two for the CHRROM banking value and one for the PRGROM switching value.
Those are no usual registers, but boolean register so only the LSB is written to the mapper. Set the MSB if you want to "reset" the register (you have to always do it at CPU reset), regardless of the value of the register.
When you write to the MMC1, it does 5 internal "temporary" switches to get the value in any register, and when you set up the 5th value the register is uploaded.
The usual way to upload a register is like this. Typically you have a simple banksitching like UNROM does on the MMC1, so you have one 16kb bank switched at $8000-$bfff and a hardwired bank at $c000-$ffff and have vertical mirroring. Let's say you're using two 4kb ChrRom switch.
So, regardeless of 1 bit switching, you have to write $1e into reg 0 (%0001'1110 = $1e). The code is :
Code:
lda #$80 ;Reset reg 0
sta $8000 ;This is needed only one at reset
lda #$fe
sta $8000 ;Write all 5 bits to the mappers
lsr A
sta $8000
lsr A
sta $8000
lsr A
sta $8000
lsr A
sta $8000 ;Reg 0 is uploaded NOW
rts
All MMC1 regs works the same, so you also have to swith your data 5 times in CHR ROM bank and PRG ROM bank registers, even if you don't use all the bits for your bankswitching. Typically, you have a 128kb PRG rom switch, so only 4 bits of reg 3 are used. Remember that bit 5 is still present in hardware, so you have to write 5 times to the mapper.