Okay, I have UNROM code running on a modified 'Konami 351258' board (ripped from a spare 'Skate or Die' of course).
I chose this board in the first place because the via's are sealed and the solder is only accessible from the bottom, so chips can't rip lines from the top-side.
Secondly, I noticed a pecularity of the '161...it seems to latch 4 data lines and send them to the '32. IIRC there's only 3 (15 16 17) possible on a 28-Pin mask rom.
Now I remember Kevtris noting that Konami switched around their pin arrangement for their UNROM boards...so I checked the pinout against mine and sure enough, there's tons of changes.
Now pin 15 on the '161 is the terminal count for carry/dasy-chaining so there is no purpose in this schematic for it, but pin 03 on the '32 seems to not be connected to the ROM, but pins 1 and 2 are wired to the '161 as if there's 2Mbit of ROM and D3 (or A14) would determine accordingly.
Here's the mindblower...If you wire pin 3 of the '32 to ROM A17 and all others accordingly for your EEPROM/Flash...It works.
Just though I'd drop this tidbit for people who would prefer an somewhat easier EEPROM coversion with a free extension for 2Mbit...
tl;dr 'Konami 351258' -> UOROM EEPROM/Flash:
I chose this board in the first place because the via's are sealed and the solder is only accessible from the bottom, so chips can't rip lines from the top-side.
Secondly, I noticed a pecularity of the '161...it seems to latch 4 data lines and send them to the '32. IIRC there's only 3 (15 16 17) possible on a 28-Pin mask rom.
Now I remember Kevtris noting that Konami switched around their pin arrangement for their UNROM boards...so I checked the pinout against mine and sure enough, there's tons of changes.
Code:
.---\/---.
Vcc - |01 16| - Vcc
ROM /CE - |02 15| - n/c
ROM+PRG D0 - |03 14| - Pin 13 of '32
ROM+PRG D1 - |04 13| - Pin 5 of '32
ROM+PRG D2 - |05 12| - Pin 10 of '32
ROM+PRG D3 - |06 11| - Pin 1 of '32
GND - |07 10| - GND
GND - |08 09| - PRG R/W
`--------'
'161
.---\/---.
Pin 11 of '161 - |01 14| - Vcc
PRG A14 - |02 13| - Pin 14 of '161
n/c - |03 12| - PRG A14
PRG A14 - |04 11| - ROM A14
Pin 12 of '161 - |05 10| - Pin 13 of '161
ROM A16 - |06 09| - PRG A14
GND - |07 08| - ROM A15
`--------'
'32
Original ASCII art by Kevin H. AKA Kevtris
Vcc - |01 16| - Vcc
ROM /CE - |02 15| - n/c
ROM+PRG D0 - |03 14| - Pin 13 of '32
ROM+PRG D1 - |04 13| - Pin 5 of '32
ROM+PRG D2 - |05 12| - Pin 10 of '32
ROM+PRG D3 - |06 11| - Pin 1 of '32
GND - |07 10| - GND
GND - |08 09| - PRG R/W
`--------'
'161
.---\/---.
Pin 11 of '161 - |01 14| - Vcc
PRG A14 - |02 13| - Pin 14 of '161
n/c - |03 12| - PRG A14
PRG A14 - |04 11| - ROM A14
Pin 12 of '161 - |05 10| - Pin 13 of '161
ROM A16 - |06 09| - PRG A14
GND - |07 08| - ROM A15
`--------'
'32
Original ASCII art by Kevin H. AKA Kevtris
Now pin 15 on the '161 is the terminal count for carry/dasy-chaining so there is no purpose in this schematic for it, but pin 03 on the '32 seems to not be connected to the ROM, but pins 1 and 2 are wired to the '161 as if there's 2Mbit of ROM and D3 (or A14) would determine accordingly.
Here's the mindblower...If you wire pin 3 of the '32 to ROM A17 and all others accordingly for your EEPROM/Flash...It works.
Just though I'd drop this tidbit for people who would prefer an somewhat easier EEPROM coversion with a free extension for 2Mbit...
tl;dr 'Konami 351258' -> UOROM EEPROM/Flash:
Code:
Pull up Mask ROM pins 28 and 22
Pull up EEPROM pins 1, 2, 24, 30, 31, and 32
EEPROM Pins 31 and 32 to Mask ROM Pin 28 (or other Vcc source)
EEPROM Pin 30 to 74'32 Pin 3
EEPROM Pin 1 to Vcc (or Float, recommended for compatibility with 4Mbit CMOS PROMs)
EEPROM Pin 2 to Mask ROM Pin 22 (or 74'32 Pin 6)
Pull up EEPROM pins 1, 2, 24, 30, 31, and 32
EEPROM Pins 31 and 32 to Mask ROM Pin 28 (or other Vcc source)
EEPROM Pin 30 to 74'32 Pin 3
EEPROM Pin 1 to Vcc (or Float, recommended for compatibility with 4Mbit CMOS PROMs)
EEPROM Pin 2 to Mask ROM Pin 22 (or 74'32 Pin 6)