I know this is kind of impractical for most purposes, but I'm interested in essentially designing the NES (including the CPU, PPU, Memory, NTSC Video Encoder, etc. ) in hardware (using Verilog on an FPGA, to be specific).
Right now I'm kind of overwhelmed with the amount of work it would take to get something like this working, but I think it can be done.
Do any of you have any tips/good documents to look at on how I should go about designing something like this? For starters, I'll need a really detailed document on how the 2A03 CPU works. I already have a SDRAM Memory Controller and Video Encoder working.
Thanks a bunch,
Parth
P.S. I posted this on the NESdev forum, but I've realized that this is probably a better place to put it, because my job will be very similar to emulating)
Right now I'm kind of overwhelmed with the amount of work it would take to get something like this working, but I think it can be done.
Do any of you have any tips/good documents to look at on how I should go about designing something like this? For starters, I'll need a really detailed document on how the 2A03 CPU works. I already have a SDRAM Memory Controller and Video Encoder working.
Thanks a bunch,
Parth
P.S. I posted this on the NESdev forum, but I've realized that this is probably a better place to put it, because my job will be very similar to emulating)