In order to insure that all the opcodes execute correctly in my CPU, I have been using the nestest ROM along with its corresponding log.
Although the instructions execute properly, there is a problem that I have with the BEQ opcode, 0xF0.
Here are the results according to nestest:
Here are the results from my CPU:
Here are the points at which the cycles are incremented:
I couldn't find any logical errors where I am adding the cycles, so I thought that the problem might have to do with how I am checking for page crossing. This is my current means of checking:
However, I couldn't find anything wrong with this either, which has left me stumped.
Could someone tell me what I am doing wrong that is causing my CPU to calculate the cycles incorrectly?
Although the instructions execute properly, there is a problem that I have with the BEQ opcode, 0xF0.
Here are the results according to nestest:
Code:
CFFE F0 05 BEQ $D005 A:5A X:81 Y:69 P:27 SP:FB CYC:292 SL:1
D005 A9 AA LDA #$AA A:5A X:81 Y:69 P:27 SP:FB CYC:301 SL:1 <-- CYC increased by 9
.
.
.
F2FC F0 02 BEQ $F300 A:52 X:02 Y:E9 P:67 SP:FB CYC:339 SL:183
F300 C8 INY A:52 X:02 Y:E9 P:67 SP:FB CYC: 10 SL:184 <-- CYC increased by 12 (wrapped around at 341)
D005 A9 AA LDA #$AA A:5A X:81 Y:69 P:27 SP:FB CYC:301 SL:1 <-- CYC increased by 9
.
.
.
F2FC F0 02 BEQ $F300 A:52 X:02 Y:E9 P:67 SP:FB CYC:339 SL:183
F300 C8 INY A:52 X:02 Y:E9 P:67 SP:FB CYC: 10 SL:184 <-- CYC increased by 12 (wrapped around at 341)
Here are the results from my CPU:
Code:
CFFE F0 05 BEQ $D005 A:5A X:81 Y:69 P:27 SP:FB CYC:292 SL:1
D005 A9 AA LDA #$AA A:5A X:81 Y:69 P:27 SP:FB CYC:304 SL:1 <-- CYC increased by 12
.
.
.
F2FC F0 02 BEQ $F300 A:52 X:02 Y:E9 P:67 SP:FB CYC: 4 SL:184
F300 C8 INY A:52 X:02 Y:E9 P:67 SP:FB CYC: 16 SL:184 <-- CYC increased by 12
(I know that CYC 4 != CYC 339, but that is not relevant to my question.)
D005 A9 AA LDA #$AA A:5A X:81 Y:69 P:27 SP:FB CYC:304 SL:1 <-- CYC increased by 12
.
.
.
F2FC F0 02 BEQ $F300 A:52 X:02 Y:E9 P:67 SP:FB CYC: 4 SL:184
F300 C8 INY A:52 X:02 Y:E9 P:67 SP:FB CYC: 16 SL:184 <-- CYC increased by 12
(I know that CYC 4 != CYC 339, but that is not relevant to my question.)
Here are the points at which the cycles are incremented:
- If branch is successful, increment new cycles.
On successful branch, check if page boundary crossed, and if so, increment new cycles.
Add two to new cycles for being a relative opcode
I couldn't find any logical errors where I am adding the cycles, so I thought that the problem might have to do with how I am checking for page crossing. This is my current means of checking:
Code:
public void PageCheck(uint addr1, uint addr2)
{
if (((addr1 ^ addr2) & 0xff00) != 0x0000)
{
extraCycles++;
}
}
{
if (((addr1 ^ addr2) & 0xff00) != 0x0000)
{
extraCycles++;
}
}
However, I couldn't find anything wrong with this either, which has left me stumped.
Could someone tell me what I am doing wrong that is causing my CPU to calculate the cycles incorrectly?