I had issues with glob-top nes-on-chip famiclone.
The gamepad, when plugged into second port didn't work. The CPU was generating proper STROBE and CLOCK signal and the joypad was also properly responding with serial data. All the track were checked for continuity. I think the CPU had to be broken because the D0 for second gamepad was not pulled high by internal resistor to vcc (the first was). Addiing external pullup worked but very randomly - the joypad could work for 10 minutes, but then stopped at all.
I added external $4017 address decoder & inverting buffer, all into CPLD XC9572 and connected to D0 on the cart socket. Now the joypad works properly. I described it for anyone that is curious if the nes-on-chip CPI during $4017 reads fetched data also from the D0 from the edge cart connector or just the extra track that goes to pads.
The m2 that goes from cart edge connector to cpld is delayed by tens of ns by diode-resistor-capactitor circuit.
VHDL Code:
The gamepad, when plugged into second port didn't work. The CPU was generating proper STROBE and CLOCK signal and the joypad was also properly responding with serial data. All the track were checked for continuity. I think the CPU had to be broken because the D0 for second gamepad was not pulled high by internal resistor to vcc (the first was). Addiing external pullup worked but very randomly - the joypad could work for 10 minutes, but then stopped at all.
I added external $4017 address decoder & inverting buffer, all into CPLD XC9572 and connected to D0 on the cart socket. Now the joypad works properly. I described it for anyone that is curious if the nes-on-chip CPI during $4017 reads fetched data also from the D0 from the edge cart connector or just the extra track that goes to pads.
The m2 that goes from cart edge connector to cpld is delayed by tens of ns by diode-resistor-capactitor circuit.
VHDL Code:
Code:
entity peg_napr is
Port ( a : in STD_LOGIC_VECTOR (14 downto 0);
nromsel : in STD_LOGIC;
d0 : inout STD_LOGIC;
r_nw : in STD_LOGIC;
pd0 : in STD_LOGIC;
m2 : in STD_LOGIC);
end peg_napr;
architecture Behavioral of peg_napr is
--0x4017 =
--
begin
d0 <= not pd0 when m2 = '1' and r_nw = '1' and nromsel = '1' and a(14 downto 0) = "100000000010111" else
'Z';
end Behavioral;
Port ( a : in STD_LOGIC_VECTOR (14 downto 0);
nromsel : in STD_LOGIC;
d0 : inout STD_LOGIC;
r_nw : in STD_LOGIC;
pd0 : in STD_LOGIC;
m2 : in STD_LOGIC);
end peg_napr;
architecture Behavioral of peg_napr is
--0x4017 =
--
begin
d0 <= not pd0 when m2 = '1' and r_nw = '1' and nromsel = '1' and a(14 downto 0) = "100000000010111" else
'Z';
end Behavioral;