The original release of Super Fighter III uses a slightly different variant of J.Y. Company's more well-known clone board. Apart from the mapper-selectable mirroring, its IRQ counter seems work differently. Recall that J.Y. Company's clone board just counts down 64 unfiltered PA12 rises.
The two registers $6006 and $6007 that I marked "unknown" are written to around the same time that the known IRQ register $7007 is written to. They seem to set the start value of an M2-based cycle counter, but with the strange caveat that for the screen splits to be triggered at the correct time, instead of just counting down by one every CPU cycle, I need to count down by five every fourth CPU cycle. I wonder why, and how, such a thing would be implemented in hardware.
Of course, I cannot rule out a coincidence that the values written, when interpreted in the way I described, just happen to result in correct screen splits.
PCB images by MLX.
The two registers $6006 and $6007 that I marked "unknown" are written to around the same time that the known IRQ register $7007 is written to. They seem to set the start value of an M2-based cycle counter, but with the strange caveat that for the screen splits to be triggered at the correct time, instead of just counting down by one every CPU cycle, I need to count down by five every fourth CPU cycle. I wonder why, and how, such a thing would be implemented in hardware.
Of course, I cannot rule out a coincidence that the values written, when interpreted in the way I described, just happen to result in correct screen splits.
PCB images by MLX.