Another pirate port from FDS to famicom (after SMB2J, Nazo no Murasamejou and maybe many others that you can give examples).
This mapper uses non-standard bank alignment (very similar to LH-53).
I would attach the ROM but can't see anything that I can make IPS patch from.
This mapper uses non-standard bank alignment (very similar to LH-53).
I would attach the ROM but can't see anything that I can make IPS patch from.





Code:
16kB PRG-RAM + 128kB PRG-ROM + 8kB CHR-ROM
PRG banking register $8000 (mask: $F000)
[....pppp] (pppp: PRG bank at $6000)
Mirroring register $E000 (mask: $F000)
[....m...] (m: 0=V, 1=H)
PRG mode register $F000 (mask: $F000)
[...v....] (v: 0=RAM, 1=ROM)
PRG configuration (for reads)
v 6000 6800 7000 7800 8000 8800 9000 9800 a000 a800 b000 b800 c000 c800 d000 d800 e000 e800 f000 f800
---- ---- ---- ---- ---- ---- ---- ---- ---- ---- ---- ---- ---- ---- ---- ---- ---- ---- ---- ----
0 RAM1 RAM1 RAM1 RAM1 ROMc ROMc ROMc ROMc ROMd ROMd ROMd RAM0 RAM0 RAM0 RAM0 ROMe ROMf ROMf ROMf ROMf
1 ROM# ROM# ROM# ROM# ROMc ROMc ROMc ROMc ROMd ROMd ROMd ROMd ROMe ROMe ROMe ROMe ROMf ROMf ROMf ROMf
PRG configuration (for writes)
v 6000 6800 7000 7800 8000 8800 9000 9800 a000 a800 b000 b800 c000 c800 d000 d800 e000 e800 f000 f800
---- ---- ---- ---- ---- ---- ---- ---- ---- ---- ---- ---- ---- ---- ---- ---- ---- ---- ---- ----
0 RAM1 RAM1 RAM1 RAM1 - - - - - - - RAM0 RAM0 RAM0 RAM0 - - - - -
1 RAM1 RAM1 RAM1 RAM1 - - - - - - - RAM0 RAM0 RAM0 RAM0 - - - - -
CHR configuration:
8kB RAM
Notes:
*Those are 8kB banks (just they don't always end on 8kB boundary so 2kB granularity was needed)
*RAM0 means first 8k of RAM
*RAM1 means second 8k of RAM
*ROM# means ROM with the bank selected by register $8000
*ROMc/ROMd/ROMe/ROMf means $c/$d/$e/$f 8kB bank of the ROM
PRG banking register $8000 (mask: $F000)
[....pppp] (pppp: PRG bank at $6000)
Mirroring register $E000 (mask: $F000)
[....m...] (m: 0=V, 1=H)
PRG mode register $F000 (mask: $F000)
[...v....] (v: 0=RAM, 1=ROM)
PRG configuration (for reads)
v 6000 6800 7000 7800 8000 8800 9000 9800 a000 a800 b000 b800 c000 c800 d000 d800 e000 e800 f000 f800
---- ---- ---- ---- ---- ---- ---- ---- ---- ---- ---- ---- ---- ---- ---- ---- ---- ---- ---- ----
0 RAM1 RAM1 RAM1 RAM1 ROMc ROMc ROMc ROMc ROMd ROMd ROMd RAM0 RAM0 RAM0 RAM0 ROMe ROMf ROMf ROMf ROMf
1 ROM# ROM# ROM# ROM# ROMc ROMc ROMc ROMc ROMd ROMd ROMd ROMd ROMe ROMe ROMe ROMe ROMf ROMf ROMf ROMf
PRG configuration (for writes)
v 6000 6800 7000 7800 8000 8800 9000 9800 a000 a800 b000 b800 c000 c800 d000 d800 e000 e800 f000 f800
---- ---- ---- ---- ---- ---- ---- ---- ---- ---- ---- ---- ---- ---- ---- ---- ---- ---- ---- ----
0 RAM1 RAM1 RAM1 RAM1 - - - - - - - RAM0 RAM0 RAM0 RAM0 - - - - -
1 RAM1 RAM1 RAM1 RAM1 - - - - - - - RAM0 RAM0 RAM0 RAM0 - - - - -
CHR configuration:
8kB RAM
Notes:
*Those are 8kB banks (just they don't always end on 8kB boundary so 2kB granularity was needed)
*RAM0 means first 8k of RAM
*RAM1 means second 8k of RAM
*ROM# means ROM with the bank selected by register $8000
*ROMc/ROMd/ROMe/ROMf means $c/$d/$e/$f 8kB bank of the ROM