Bregalad wrote:
Normally the 6502 puts M2 high only when the adress lines are stable, so even if a chip responds really fast to the low->high M2 transition, the adress are already stable.
Hmm, I had forgotten about M2. I've done a bit more stuff with other processors and you have to worry about glitches as the RAM will get trashed.
Memblers wrote:
I forgot to mention the Midines RAM would have been CHR only, as well.
I still don't 100% understand what the deal was with the sprite-DMA causing problems with my EPROM emulator (causing 1 or 2 constantly corrupted sprites). IIRC kevtris had theorized that the DMA may be allowing some brief glitches on the chip enable, and if the PRG chip is fast enough it might respond to it.
In any event, putting resistors in series with the data bus was the only way to fix that.
I can understand the glitches happening, but not sure I see how putting resistors in series with the data bus would help. The RAM would still get enabled.
I have enough RAM that I think sticking this on the CHR RAM side only will be good enough.
Thanks for the help everyone.