Hi again. Can anyone confirm that MMC1A(B) gives default on "power on"
1)WRAM 6000-7FFFh
2)CHR1 0000-0FFFh CHR2 1000-1FFFh
3)PRG1 8000-BFFFh PRG2 C000-FFFFh
Thanks in advance
The bank numbers are unknown at power up... I've tested and seen this myself.
The only thing that is known as for banks is PRG C000-FFFF is fixed to the last bank at start up for all versions of MMC1. That way your startup code can be placed there only and it's known that it'll be hit at start up.
And I'm not sure what you mean by WRAM, there is only one bank... whether or not the WRAM is enabled at power up depends on which version of MMC1.
Thanks for reply. I specified revisions of MMC1 - A and B.
WRAM=Working RAM=PRG RAM
Ok, i try with LED's on real hardware.
infiniteneslives wrote:
The only thing that is known as for banks is PRG C000-FFFF is fixed to the last bank at start up for all versions of MMC1. That way your startup code can be placed there only and it's known that it'll be hit at start up.
Really? I thought we had decided the opposite. That it could be on any 32k page at startup, so you need to copy your reset code to the end of each 32k bank.
80sFREAK: I understand what WRAM is.. I just don't understand what you're asking about it.
If you're asking about whether or not it's enabled or disabled at start-up Kevtris explains it pretty well:
http://kevtris.org/mappers/mmc1/index.html it depends on what version of MMC1. But for MMC1A there is not disabling unless CA16 output is tied to WRAM /CE like on SNROM boards. MMC1B can be disabled but it's unknown at startup. Only MMC1C is known and it starts up as disabled. I haven't verified any of this personally but I trust what Kevtris is saying.
Dwedit:
Can you point me where this was determined?
Kevtris is a little ambiguous in his docs but states that,"Bank C000-FFFFh is fixed, while 8000-FFFFh is swappable. (power-on default)"
And according to Disch:
On Powerup:
----------------------------
This varies from version to version. Earlier MMC1 versions have no determined startup state. Later ones do.
- bits 2,3 of $8000 are set (16k PRG mode, $8000 swappable)
Now I only played around with MMC1B1 from a Tetris cart but it started up just as those guys both stated. Assuming Kevtris is saying that's the default for all versions then he would disagree with Disch who's saying it's only late versions that do.
I tested MMC1B1 so perhaps MMC1A's start up is unknown. Maybe we need more testing is needed to confirm...
infiniteneslives wrote:
I tested MMC1B1 so perhaps MMC1A's start up is unknown. Maybe we need more testing is needed to confirm...
http://nesdev.com/bbs/viewtopic.php?t=6766
On all of the those revisions, last bank was switched in at $C000-FFFF on powerup.
Ok, that's clearing little bit.
MMC1B WRAM by default can be "ON" or "OFF"
But still
1) by default we do have 32kB bank 8000-FFFFh or not?
2) where is default bank located in ROM image
I connected some LED's via 1kOm resistors from GND to CHR A12, PRG16, 15, 14, 13.
On "power on" with /RESET mapper PRG outputs are flickering.
I know B2 starts on page 0F always, never tested A/No reveision or whatever the 3rd one is. Start testing yourself.
(Forgot to post, doh)
http://www.2shared.com/file/07yxs_z0/Program.html
You need an SNROM board, 256KB PRG-ROM for this test cart. If needed I can include a source too to modify it to CHR-ROM or maybe even test CHR-ROM too.
I suppose any size PRG ROM will do the job - just make endless loop on start-up without touching anything. LED's to mappers output.
I'm pretty sure MMC1A and upper guarantees the last bank at $c000-$ffff on startup.
At least I have a MMC1A devcart, and always placed my reset code here without mirroring it elsewhere, and it worked.
I think maybe the original MMC1 doesn't have this guarantee, so if you're going to use an original MMC1 maybe it's safer to copy your reset code in each 32kb bank (or even 16kb bank ? if it starts in high 16k swapping mode with a random bank ?).
80sFREAK wrote:
But still
1) by default we do have 32kB bank 8000-FFFFh or not?
2) where is default bank located in ROM image
1) NO, it starts up in 16KB mode with the first bank swapable and second bank fixed. The first bank ($8000-BFFF) is determined by reg3 (unknown at startup). THe second ($C000-FFFF) PRG bank is always the LAST bank at startup.
2) The LAST 16KB bank of the ROM. PRG A13-17 are all high, so regardless of how big the rom is the LAST bank is always selected when reading from $C000-FFFF.
Quote:
I connected some LED's via 1kOm resistors from GND to CHR A12, PRG16, 15, 14, 13.
On "power on" with /RESET mapper PRG outputs are flickering.
What is the input PRG A14??? Without knowing that the outputs flickering doesn't mean much other than PRG A14 is probably "flickering" as well. Although I would expect it to be stable...
Ok, done with start up ROM - last 16k only.
Plugged cart into Famicom, pushed reset button, powered on. Not very good way to do, i should try power up only cart with stated inputs.
Mapper is MMC1B2 WRAM /OE->GND /CE ->MA16 have to check 6000h and 7000h if /CE become active by default
Maybe it's worth noting that besides the different revisions, there are also different manufacturers of the MMC1. The ones with an S on them I think are by Sharp, and I guess the other ones are Ricoh? Can't say I know what the difference are, if any.
Also I'm pretty sure that the WRAM /OE is tied directly to ground. The MMC1 generally only controls the CE input on the WRAM. THe exception being SNROM which has CHR A17 re-appropriated for /CE as well.
80sFREAK wrote:
Plugged cart into Famicom, pushed reset button, powered on. Not very good way to do, i should try power up only cart with stated inputs.
Yeah you're data is pretty much worthless unless you know what your inputs to the MMC1 are... Testing in the console is pretty difficult unless you write test roms and burn them onto the cart and such.
For my testing I used a mcu connected to the cart edge that I could manipulate via USB. It happened to be the kazzo hardware with my own firmware and software.
So, i powered cart separately with specified inputs, can confirm about last bank PRG, but not about WRAM
plus looks like i damaged mapper
80sFREAK wrote:
So, i powered cart separately with specified inputs, can confirm about last bank PRG, but not about WRAM
plus looks like i damaged mapper
Grab each MMC1 revision and test them with my MMC1 Test ROM that will tell you all you want to know about MMC1 WRAM info? If you want it I'll give you the source, too.
3gengames wrote:
80sFREAK wrote:
So, i powered cart separately with specified inputs, can confirm about last bank PRG, but not about WRAM
plus looks like i damaged mapper
Grab each MMC1 revision and test them with my MMC1 Test ROM that will tell you all you want to know about MMC1 WRAM info? If you want it I'll give you the source, too.
That's a lot of carts to hack up to find out what seems to be close to useless info when you can just assume it starts up disabled in most cases.
80sFREAK: What exactly are you looking to do with this info? Is there some reason you can't just assume WRAM starts up disabled?
Transplant MMC1's? And even then, if you want to experiment on carts, you're going to use parts somehow, get over that too.
3gengames wrote:
Transplant MMC1's? And even then, if you want to experiment on carts, you're going to use parts somehow, get over that too.
It's not about getting over anything... It's just silly re-test all this by means of EEPROM tests. It's VERY simple to check this info without doing any solder work.
It's already been verified that only the MMC1C starts up with WRAM starts up as disabled. ALL others are unknown, and early versions can't even have WRAM disabled without making use of unused CHR ROM lines.
I just don't understand what he's trying to figure out that could be valuable information to have. So either I'm missing the point (why I'm asking the question) or he's looking to do a lot of needless work to re-verify things that have already been determined...
"Unknown" is not an answer for me.
It have to be "undefined" or "enabled" or "disabled".
Unfortunately i don't have MMC1C, but MMC1B2, MMC1B3 and MMC1A on cheap donors.
Ok, i will ask little bit different way -
1) can MMC1Bx based cart work as UNROM on power-up with WRAM enabled?
2)is 2 banks of CHR-ROM in MMC1Bx based cart is on by default on power-up?
Just want to figure out, can i use MMC1Bx cheap donors(i have quite a lot of them) for my project?
80sFREAK wrote:
"Unknown" is not an answer for me.
It have to be "undefined" or "enabled" or "disabled".
By unknown I mean undefined in your words... (semantically "undefined" means between logic 1 and 0 in my book. When the mapper is powered up you don't know it's state but it's defined as a 1 or 0, aka "unknown" which stems from HDLs.)
Since your still having issues I'll spell it out, Kevtris is accurate on this to my knowledge:
MMC1A: This is the original version. WRAM cannot be disabled on this version.
MMC1B: On this and the MMC1C versions of the chip, WRAM can be disabled.
MMC1C: Like the 1B, the WRAM can be disabled, however it defaults to disabled on powerup. The MMC1B can default to either state.
The only thing he doesn't consider is SNROM boards like I've previously mentioned. But that's also unknown/undefined because CHR registers are undefined/unknown at start up.
I wonder if CHR registers are really unknown at startup.
I am not completely sure, but maybe the reason Nintendo did this thing (wire WRAM /CE to CHRA17) in the first place is because the register defaults at '1'.
I mean - as far I know no game ever purposely set this bit to disable WRAM.
And all SNROM games I've ever checked write 0 to the CHR registers at startup - enabling the WRAM (probably without really knowing it).
If the registers defaults at '0' then this change nothing, if the cartridge makes bad contact when you turn the console on, the CPU will not fetch the correct instructions (or even the correct reset adress), and will jam, possibly doing writes to WRAM, which can corrupt the saves on the cart.
However, if the registers defaults at '1', then if the same case happens, the CPU is unlikely to write to the CHR-regs to enable VRAM, and therefore if the CPU does dummy writes to WRAM it won't corrupt the data as it is disabled.
Yet this protection is far from perfect - it doesn't prevent write corruption at power down, and the CPU could still accidentally enable WRAM when it goes crazy. Also it only works on SNROM carts where the CHR regs default to '1', which is quite limiting.
This is probably why they implemented a better protection when they decided to release new generations of MMC1s using the highest bit of reg3.
Remember that SNROM was the first PCBs with battery backup ever made, and that they used the earlier MMC1s with no other kind of VRAM security.
infiniteneslives wrote:
MMC1A: This is the original version. WRAM cannot be disabled on this version.
check. Good news actually.
Quote:
MMC1B: On this and the MMC1C versions of the chip, WRAM can be disabled.
but on start-up it's 50/50. Ok, let's specify further - B2 and B3???
Quote:
MMC1C:.... it defaults to disabled on powerup.
check
Quote:
I am not completely sure, but maybe the reason Nintendo did this thing (wire WRAM /CE to CHRA17) in the first place is because the register defaults at '1'.
Good news
Quote:
CPU will not fetch the correct instructions (or even the correct reset adress)
in the ROM image you'd say